| | Benchmark 2799
ON Semiconductor RSL10 Rev 1.0 |
|---|
| Hardware Environment |
|---|
| Device Vendor | ON Semiconductor |
| Device Name and Revision | RSL10 Rev 1.0 |
| Core | ARM Cortex-M3 |
| Production silicon | Yes |
| Processor Datasheet | RSL10-D.PDF |
| Board Vendor | ON Semiconductor |
| Board Name and Revision | RSL10 QFN EVB V1.3 |
| External DC-DC (if used) | |
| External DC-DC datasheet (if used) | |
| Size (in bytes) of retention SRAM | 8192 |
| Does the Timestamp GPIO use the same voltage as the Unmonitored VCC on the EMON? | |
| Software Environment |
|---|
| Compiler Name and Version | IAR C/C++ Compiler for ARM 8.20.1.14183 |
| Compiler Flags | high speed, no size constraints |
| ULPBench Profile and Version | 1.1.12 |
| EnergyMonitor Software Version | 1.1.12.003 |
| ULPBench Binary File | CP 3.0v: ulpmark_cp.hex
CP x.yv: ulpmark_cp.hex
|
| Operating Conditions |
|---|
| Ambient Temperature [C] | 24 |
| System Supply Voltage [V] | 2.100 |
| Board Configuration Details |
|---|
| Description of how to run benchmark, board configuration & rework instructions | ulpmark_RSL10_setup.pdf |
| Board extended documentation and/or user guide | |
| Profile Configuration Details |
|---|
| Wakeup Timer Module | RTC |
| Wakeup Timer Clock Source | External Crystal |
| Wakeup Timer Frequency [Hz] | 32768 Hz |
| Wakeup Timer Accuracy [ppm] | 20 ppm |
| Benchmark Scores |
| ULPMark-CP (3.0v) |
1090.00 |
| ULPMark-CP (x.yv) |
1260.00 (2.10v) |
| ULPMark-PP (3.0v) |
n/a |
| Configuration 1 | |
| Configuration 2 | |
| Configuration 3 | |
| Configuration 4 | |
| Configuration 5 | |
| Configuration 6 | |
| Configuration 7 | |
| Configuration 8 | |
| Configuration 9 | |
| Configuration 10 | |
| ULPMark-PP (x.yv) |
n/a |
| Configuration 1 | |
| Configuration 2 | |
| Configuration 3 | |
| Configuration 4 | |
| Configuration 5 | |
| Configuration 6 | |
| Configuration 7 | |
| Configuration 8 | |
| Configuration 9 | |
| Configuration 10 | |
