EEMBC
Reveals Impact of Compiler Technology in Optimizing Ultra-Low Power IoT
Applications
Latest
ULPBench™ Results from Texas Instruments Incorporated and IAR
Systems Demonstrate Significant Energy Efficiency Improvements
The MCUs are part of TI’s MSP430FRxx
microcontroller series featuring non-volatile FRAM. IAR Embedded Workbench is an
integrated development environment including an optimizing C/C++ compiler that
supports 40 different processor architectures. Recent compiler enhancements were
specifically targeted at the MSP430FRxx MCU product family, allowing developers
to link their application code objects to better take advantage of the dual-pipeline,
64-bit cache architecture. Due to this enhancement, the ULPBench scores jumped
from 117 to 123, representing a five percent improvement.
“Although a five percent improvement might
not sound very impressive, it represents a very important lesson for developers
of ultra-low power applications, that is, optimizing for energy efficiency
requires a judicious approach to selecting the right microcontroller and
development tools and carefully writing your application code. For example, ensuring
that data placements were aligned to minimize non-volatile memory fetches will
have a noteworthy impact on a product’s battery life,” said Markus Levy,
EEMBC’s president. “To further emphasize the value of the compiler in ULP
applications, another microcontroller vendor’s device recently yielded a 23
percent improvement in ULPBench results by switching from one compiler to
another. These results can be viewed on the EEMBC website.”
"Providing our developers with low-power
microcontrollers without compromising performance has always been one of our
main priorities at TI. We are thrilled that our architectural advantages in the
MSP microcontroller family are leading to these benchmark results," said
Miller Adair, General Manager, MSP microcontrollers at TI. “We are excited to
be a member of EEMBC and to help build benchmarking tools like ULPBench that
will provide our customers and others with reliable and real-world information
for devices such as our MSP FRAM MCU family.”
“In this new compiler version, we included a
combination of several peephole optimizations. For example, one enhancement focused
on better utilization of hardware multiplier units,” said Petter
Edman, CTO of IAR. “In addition to the improvements in the active mode
component of ULPBench, these enhancements will also improve performance of
matrix math operations in general.”
The EEMBC ULPBench working group, chaired by
Stefan Schauer, application verification and validation
engineer at TI, is expanding the functionality of its energy benchmark to
include various peripheral functions in MCUs. Building on ULPBench, EEMBC
previously announced a working group focused on the energy efficiency of edge
nodes (end points) on the Internet of Things (IoT). To join either working
group, contact Markus
Levy for details.
About EEMBC
EEMBC was
formed in 1997 to develop performance benchmarks for the hardware and software
used in embedded systems. EEMBC benchmarks help predict the performance and
energy consumption of embedded processors and systems in a range of
applications (i.e. automotive/industrial, digital imaging and entertainment,
networking, office automation, telecommunications, and connected devices) and
disciplines (processor core functionality, floating-point, Java, multicore, and
energy consumption).
EEMBC members
include Ambiq Micro, AMD, Analog Devices, Andes
Technology, ARM, Atmel, C-Sky Microsystems, Cavium, Cypress Semiconductor,
Dell, Freescale Semiconductor, Green Hills Software, IAR Systems, Imagination
Technologies-MIPS, Infineon Technologies, Intel, Lockheed Martin, Marvell
Semiconductor, MediaTek, Microchip Technology, Nokia Networks, Nordic
Semiconductor, NVIDIA, NXP Semiconductors, Qualcomm, Realtek Semiconductor, Red
Hat, Renesas Electronics, Samsung Electronics, Silicon Labs, Somnium
Technologies, Sony Computer Entertainment, STMicroelectronics, Synopsys, Texas
Instruments, TOPS Systems, and Wind River Systems.